The present invention relates to a semiconductor device and a manufacturing method thereof, and for example, to an effective technique that can be applied to a semiconductor device having an electrically rewritable non-volatile memory and a manufacturing technique thereof.
Japanese Unexamined Patent Publication No. 2006-49737 (Patent Document 1) describes a technique for removing an exposed portion of a laminated insulating film (ONO film) including: a silicon oxide film in an upper layer; a silicon nitride film in the layer below the silicon oxide film; and a silicon oxide film in the layer below the silicon nitride film.
Patent Document 1 also describes the layout of an element isolation region arranged in a memory cell portion. Herein, Patent Document 1 describes the layout in which, in a crossing region where a memory gate electrode and the element isolation region cross each other, the width of an edge side near to a source region is the same as that of an edge side near to a control gate electrode.